[IA64] Rearrange IA64_TR_ definitions to use from lower value

SDM vol2 4.1.1.1 says that:
 "software should allocate contiguous translation registers starting
  at slot 0 and continuing upwards."

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>

diff --git a/xen/include/asm-ia64/xenkregs.h b/xen/include/asm-ia64/xenkregs.h
index fb62f70c0e3db2f78dd254cfc6da4f99c5652ab0..432387ac9868e2b571f7868a8a16fc430b1253ad 100644 (file)
--- a/xen/include/asm-ia64/xenkregs.h
+++ b/xen/include/asm-ia64/xenkregs.h
@@ -4,10 +4,11 @@
 /*
  * Translation registers:
  */
-#define IA64_TR_SHARED_INFO    3       /* dtr3: page shared with domain */
-#define        IA64_TR_VHPT            4       /* dtr4: vhpt */
+#define IA64_TR_XEN_HEAP_REGS  3       /* dtr3: xen heap identity mapped regs */
+#define IA64_TR_SHARED_INFO    4       /* dtr4: page shared with domain */
 #define IA64_TR_MAPPED_REGS    5       /* dtr5: vcpu mapped regs */
-#define IA64_TR_XEN_HEAP_REGS  6       /* dtr6: xen heap identity mapped regs */
+#define        IA64_TR_VHPT            6       /* dtr6: vhpt */
+
 #define IA64_DTR_GUEST_KERNEL   7
 #define IA64_ITR_GUEST_KERNEL   2
 /* Processor status register bits: */